The invention is generally directed to computers and input/output adapters for use therewith, and in particular, to the transmission of sideband signals between computers and industry standard input/output adapters.
Interconnectivity between devices within a computer or other data processing system is often as critical or more critical to system performance than the performance of the individual devices. For example, great advances have been made in the performance of microprocessors, including increasingly-higher clock speeds and improved instruction throughput. Yet, even if a microprocessor is able to process instructions and data at a faster rate than previous designs, if the microprocessor cannot be fed instructions and data fast enough to match the performance of the microprocessor, the overall performance of a data processing system may not substantially improve.
One particular area of concern in many data processing systems is that of input/output (I/O) connectivity between the primary processor/memory complex of a data processing system and various external devices such as storage devices, display devices, external networks, I/O processors, service processors, etc. One solution for providing such connectivity is the Peripheral Component Interconnect (PCI) architecture, an industry standard architecture that is principally used to interface a processor/memory complex of a data processing system to various external devices through dedicated input/output adapters (IOA""s) coupled over a shared bus.
An IOA, in this context, is typically implemented as a printed circuit board, incorporating a male-type edge connector including a plurality of electrical contacts and suitable for mechanical and electrical engagement within a female-type connector mounted to a motherboard, backplane or other structure housed within a computer enclosure. The location within which the IOA is inserted into the enclosure is typically referred to as a slot, and for complex systems, multiple slots are typically provided in close proximity to one another and served by a backplane. To provide an interface to an external device, an IOA typically also includes a tailstock including one or more additional connectors, although additional connectors may not be included on a tailstock on some IOA""s. The printed circuit card of an IOA typically includes logic for driving the connections to the PCI bus and to any external devices, and may include additional logic circuitry, even that of the external device itself.
Due to the inherent performance limitations of a shared bus, which are not particularly relevant to an understanding of the invention, other higher performance I/O architectures have been developed, but which still use IOA""s as a predominant component in interconnecting multiple devices to one another. For example, the InfiniBand standard defines a high-speed serial, channel-based, message-passing, scalable switched fabric that is likely to replace the PCI standard in high performance applications such as server and other multi-user environments. With the InfiniBand standard, all systems and devices (called nodes) attach to the fabric through channel adapter logic. Host servers typically attach using IOA""s referred to as Host Channel Adapters (HCA""s), while target devices attach using IOA""s referred to as Target Channel Adapters (TCA""s). One or more switches can connect any number of hosts and target devices to provide a highly reliable fabric. The benefits of the InfiniBand architecture include, among other benefits, easier and faster data connectivity, built-in quality of service and improved usability.
In addition to the interconnectivity provided by IOA""s and associated I/O architectures, data processing systems may also have a need for additional external interconnectivity, particularly to provide system administration, servicing and diagnostics services via a variety of xe2x80x98basexe2x80x99 I/O signals driven from motherboards, backplanes, service processors, and enclosure services processors to the backplate of the system chassis (typically proximate to the tailstocks of the installed IOA""s. The backplates typically secure cable connectors to drive various base I/O signals to devices external to the system chassis. Examples of base I/O signals include GPIO (general purpose I/O), Modems, LAN""s, parallel ports, USB ports, JTAG ports, and associated other serial ports. These xe2x80x98basexe2x80x99 ports are typically used for system administration connections, enclosure services connections, certain peripheral connections, and service connections. In many instances, unlike IOA signals, base I/O signals are generally available and functioning before main power is available to an IOA and before the primary Operating System in a data processing system is booted.
In designing and developing a data processing system component such as a computer chassis, architects often face a dilemma in choosing how to provide base I/O functionality, i.e., what function to choose for different makes and models, which interfaces should be featurable (pluggable), and which should xe2x80x98escapexe2x80x99 the chassis from an IOA tailstock or escape through the stamp-outs in the chassis backplate.
Designers and architects of data processing systems typically favor a high degree of flexibility when making decisions and tradeoffs. In the context of base I/O connectivity, one tradeoff that is desired but seldom available is to xe2x80x98snap-inxe2x80x99 a base I/O function using a pluggable xe2x80x9cindustry-standardxe2x80x9d form factors, e.g., the same form factors used by IOA""s. Doing so is desirable as a design may be able to leverage industry standard mechanical components, differentiate a product offering for competitive advantage, reduce a rack drawer height (e.g., by using an IOA slot instead of drawer space under the IOA chassis slots), and obtain maximum flexibility in deciding how and where to locate base I/O external connections. Moreover, a xe2x80x98snap-inxe2x80x99 itself may have a commercial value since it is based on industry standards, and since the flexibility is provided to plug the xe2x80x98snap-inxe2x80x99 into a normal industry-standard IOA slot and/or backplane connector.
While providing such xe2x80x98snap-inxe2x80x99 functionality is desirable, often with many industry standard I/O architectures, e.g., PCI and InfiniBand, every single xe2x80x98pinxe2x80x99 or signal path on the pluggable interface between a backplane and an IOA is defined, or reserved for future enhancements to the standard. The signal paths are defined by the respective standards to satisfy PCI bus and InfiniBand link signaling and leave no room for additional signals (herein referred to as xe2x80x9csidebandxe2x80x9d signals) not specifically tailored to those I/O architectures. Were a reserved pin used for sideband communication, later revisions of the underlying standard could introduce design conflicts that could obsolete either an IOA or backplane design.
Some prior attempts to provide base I/O communication in connection with industry standard IOA""s have focused on allocating space in a chassis backplate for DB9, parallel, serial, RJ11, RJ45, modem, etc. connectors on the rear of a chassis, and with cabling utilized to interconnect such connectors with driving logic circuitry disposed in the chassis. Should a manufacturer choose to support multiple models of a particular data processing system design, however, often excess backplate space must be reserved to ensure sufficient space for the external connectors required by different models based on a particular design. Other prior attempts utilize cabling to couple the driving logic circuitry for a chassis to various IOA""s for external connectivity through the IOA""s tailstocks. Still other configurations attempt to cable IOA form factor derivatives to each other or to the backplane using cables.
Therefore, there exists a need for a manner of enabling base I/O communication with a data processing system, and in particular in such a manner that leverages existing industry standard IOA form factors while maintaining compatibility with such industry standards.
The invention addresses these and other problems associated with the prior art by incorporating sideband communication capability into an Input/Output Adapter (IOA) and/or a host apparatus in a manner that permits the communication of base I/O and other sideband signals between and among an IOA and/or a host apparatus in a manner that does not conflict with standard IOA and/or I/O architecture form factors.
Consistent with one aspect of the invention, the primary connector of an IOA is selectively partitioned to permit sideband information to be communicated across the primary connector, often without compromising the primary communication functionality of the primary connector. In particular, sideband configuration information, which identifies at least one contact on the primary connector that is adapted for sideband communication, is maintained within an IOA and is capable of being conveyed to a host apparatus. Based upon such sideband configuration information, a subset of signal paths in the host apparatus may be selectively configured for sideband communication.
Also, an IOA consistent with this aspect of the invention may include tri-state logic coupled to a subset of the contacts in a primary connector that is adapted for sideband communication, as well as configuration logic capable of outputting the sideband configuration information for the IOA.
An apparatus consistent with this aspect of the invention may include a slot connector configured to electrically and mechanically engage a primary connector on an IOA, and control logic configured to receive the sideband configuration information from the IOA via the slot connector and selectively configure a subset of the contacts on the slot connector for sideband communication based on the sideband configuration information.
Consistent with another aspect of the invention, a second, sideband edge connector may be incorporated into an IOA in connection with a first, primary edge connector coupled to a circuit board substrate of the IOA. The sideband edge connector may be configured to extend in the same direction as the primary edge connector (generally along an insertion axis), but may be laterally offset from the primary edge connector transversely from the insertion axis and along a plane defined by the circuit board substrate.
A cooperative apparatus suitable for receiving such an IOA may include a slot connector configured to electrically and mechanically engage the primary edge connector of the IOA, and a sideband connector offset from the slot connector in much the same manner as the sideband edge connector is offset from the primary edge connector on the IOA.
These and other advantages and features, which characterize the invention, are set forth in the claims annexed hereto and forming a further part hereof. However, for a better understanding of the invention, and of the advantages and objectives attained through its use, reference should be made to the Drawings, and to the accompanying descriptive matter, in which there is described exemplary embodiments of the invention.